
Design Implementation
2 weeks ago
Job Area: Engineering Group, Engineering Group > Hardware Engineering
General Summary:
Experience:
3+ years of experience in RTL, UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff.
Proficiency in Python/Tcl.
* Familiar with Synthesis tools (Fusion Compiler/Genus).
* Fair knowledge in LEC, LP signoff tools.
* Proficient in VLSI front end design steps - Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking.
* Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus.
* Should be sincere, dedicated and willing to take up new challenges.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
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