Senior ASIC Design Engineer

3 days ago


Hyderabad City Taluka, Pakistan beBee Careers Full time
Job Description

We are seeking a highly skilled Senior ASIC Design Engineer to join our team. As a key member of our design team, you will be responsible for implementing high-performance CPU designs using advanced Place and Route techniques.

Responsibilities:
  • Design and implement Place and Route recipes for optimal Performance, Power, and Area (PPA) results.
  • Collaborate with RTL design, Synthesis, low power, Thermal, Power analysis, and Power estimation teams to optimize PPA.
  • Develop and execute design of experiments to improve quality of results and tuning recipes.
  • Analyze metrics results for comparison and tabulate data for analysis.
Requirements:
  • 6-15 years of experience in high-performance core Place and Route and ASIC design implementation.
  • Extensive experience in Place and Route with FC or Innovus is required.
  • Complete ASIC flow with low power, performance, and area optimization techniques.
  • Experience with STA using Primetime and/or Tempus is required.
  • Proficient in constraint generation and validation.
  • Multiple power domain implementation with complex UPF/CPF definition is required.
  • Formal verification experience is an asset.
  • Perl/Tcl, Python, C++ skills are necessary.
  • Strong problem-solving and ASIC development/debugging skills.
Preferred Qualifications:
  • Experience with CPU micro-architecture and critical path.
  • Low power implementation techniques expertise.
  • High-speed CPU implementation knowledge.
  • Clock Tree Implementation Techniques for High-Speed Design Implementation.
  • Constraint management tool and Verilog coding experience.

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