Senior Hardware Validation Engineer

10 hours ago

Hyderabad City Taluka, Pakistan beBee Careers Full time
Job Overview

We are seeking a highly skilled Senior Hardware Validation Engineer to join our team. As a key member of our engineering group, you will be responsible for designing, developing, and debugging system validation frameworks for SoC validation.


About the Role

In this role, you will work closely with design and software teams to understand the SoC architecture and prepare test plans. You will develop, port, and enhance system validation content based on system level use cases, low power use cases, and find hardware bugs and root cause them.


Key Responsibilities
  • Design, develop, and debug system/IP validation framework for bare-metal and light-weight-RTOS environment for SoC validation.
  • Understand the SoC architecture and new features, and prepare comprehensive test plans.
  • Develop, port, and enhance system validation content based on system level use cases, low power use cases, and identify hardware bugs and root cause them.
  • Collaborate with design and software teams to ensure smooth execution of test plans and debug complex issues.
  • Interface with various IP validation teams and cross-functional teams for test plan creation and debug complex issues.
  • Utilize silicon debug hooks to measure power, performance, coverage, and other KPI metrics.

Requirements
  • Bachelor's or Master's degree in Electronics and Communication Engineering, Computer Science, or a related field.
  • Minimum 2-5 years of experience in embedded systems, hardware validation, or a related field.

Mandatory Skills
  • Strong knowledge of embedded software architecture and development in C, C++, and Assembly.
  • C language expertise for low-level programming and assembly language for any processor.
  • Good understanding of ARMv8/ARMv9/x86/PowerPC CPU architecture, interrupt handling, cache coherency, and IO coherency.
  • Knowledge of operating systems, RTOS, Linux kernel internals, multithreading, scheduling policies, locking mechanisms, virtual memory, MMU, and paging.
  • Familiarity with memory management, weakly ordered memory models, pipelining of memory systems, and memory barriers.
  • Experience with JTAG interfaces and tools for hardware debugging.
  • Scripting languages such as Python and shell scripting.

Desired Skills
  • Exposure to SoC architecture paradigms, interconnects, power management, and emulation (pre-Si) environment.
  • Experience working with boot code for ARM processors.
  • Software development for silicon enablement and silicon validation.
  • Board bring-up and hardware-software solution bring-up on FPGA/emulation platforms and fresh SOC designs.
  • Build automation: experience with Jenkins and creating automated build pipelines.
  • Regression testing: understanding of regression testing methodologies and tools.
  • Source code management: proficient in Perforce, Git, SVN, branching merging, and resolving merge conflicts.

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