Performance-Centric ASIC Design Expert

1 day ago


Hyderabad City Taluka, Pakistan beBee Careers Full time

Job Title: Performance-Centric ASIC Design Expert

We are seeking a skilled Performance-Centric ASIC Design Expert to join our team. As a key member of our engineering team, you will be responsible for designing and developing high-performance ASICs.

Main Responsibilities:

  1. Design and develop high-performance ASICs using advanced technologies such as Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification.
  2. Create design of experiments and perform detailed PPA comparison analysis to improve quality of results and optimize performance, power, and area (PPA).
  3. Work closely with RTL design, Synthesis, low power, thermal, power analysis, and power estimation teams to optimize PPA and ensure efficient implementation.
  4. Develop Place & Route recipes for optimal PPA and tabulate metrics results for analysis comparison.

Requirements:

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field, and 4+ years of hardware engineering experience.
  • OR Master's degree in Computer Science, Electrical/Electronics Engineering, or related field, and 3+ years of hardware engineering experience.
  • OR PhD in Computer Science, Electrical/Electronics Engineering, or related field, and 2+ years of hardware engineering experience.

Preferred Qualifications:

  • Extensive experience in Place & Route with FC or Innovus is highly desirable.
  • Complete ASIC flow with low power, performance, and area optimization techniques.
  • Experience with STA using Primetime and/or Tempus is required.
  • Proficient in constraint generation and validation.
  • Experience of multiple power domain implementation with complex UPF/CPF definition required.
  • Formal verification experience (Formality/Conformal).
  • Perl/Tcl, Python, C++ skills are necessary.
  • Strong problem-solving and ASIC development/debugging skills.
  • Experience with CPU micro-architecture and their critical path.
  • Low power implementation techniques experience.
  • High-speed CPU implementation.
  • Clock Tree Implementation Techniques for High-Speed Design Implementation are essential.
  • Exposure to Constraint management tool and Verilog coding experience.

Additional Information:

We offer a collaborative and innovative work environment that supports professional growth and development. If you are a skilled engineer looking to contribute to cutting-edge projects, please apply today



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