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Lead ASIC Designer
3 weeks ago
As a Lead ASIC Designer at Qualcomm Technologies, Inc, you will lead cross-functional teams to develop innovative solutions and meet performance requirements. You will design, optimize, verify, and test electronic systems, bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, and packaging.
Responsibilities:
- Leading expertise in the ASIC designs Place and Route flow and methodology.
- Mentorship in executing complete PD ownership from netlist to GDS2 including HM level PV, LEC, low-power checks, and PDN, STA closure.
- Leadership in Voltage Islands and low-power methodologies, flows, and implementation.
- Expertise in debugging Congestion and CTS issues.
- Knowledgeable in PnR tools (Innovus/Fusion compiler) and flow.
- Familiarity with Sign-off(PV/PDN/STA/FV/CLP/Scan-DRC(tk)) methodology and tools.
- Implementation of improving existing methodologies and flows.
- Proficient in scripting languages (TCL, PERL, PYTHON).
- Leadership and motivation.
- To lead a global team environment.
- To effectively communicate the status and issues of respective owned Tasks.
- 5-12 yrs of experience in physical design including floorplanning, PNR, CTS, and signoff checks.
